1. Field of the Invention
The present invention relates to an electron emission device, and in particular, to an electron emission device which has electron emission regions (or sources) formed with a material for emitting electrons when applied with an electric field under a vacuum atmosphere, and a method of fabricating the same.
2. Description of Related Art
Generally, the electron emission devices can be classified into two types. A first type uses a hot (or thermoionic) cathode as an electron emission source, and a second type uses a cold cathode as an electron emission source.
Also, in the second type of electron emission devices, there are a field emitter array (FEA) type, a surface conduction emitter (SCE) type, a metal-insulator-metal (MIM) type, and a metal-insulator-semiconductor (MIS) type.
The FEA type electron emission device is based on the principle that when a material having a low work function or a high aspect ratio is used as the electron emission source, electrons are easily emitted from the material in a vacuum atmosphere due to an electric field. A sharp-pointed tip structure based on molybdenum (Mo) or silicon (Si), or a carbonaceous material, such as carbon nanotube, graphite and/or diamond-like carbon, has been developed to be used as the electron emission source.
In an exemplary FEA type electron emission device, cathode electrodes and an insulating layer are formed on a substrate, and gate electrodes are formed on the insulating layer while crossing the cathode electrodes. Opening portions are formed at the gate electrodes and the insulating layer per the crossed regions thereof to partially expose the surface of the cathode electrodes, and electron emission regions are formed on the cathode electrodes within the opening portions.
The insulating layer can be formed through paste printing such that it has a thickness of 5 μm or more. A mask layer can be formed on the gate electrodes, and the gate electrodes and the insulating layer can then be wet-etched to form opening portions thereat.
However, when the wet etching is used to form opening portions at the insulating layer, the so-called under-cut phenomenon is generated at the portion of the insulating layer opposite to the etching initiation point thereof due to the etching isotropy, in which the opening width is narrowed as compared to that at the etching initiation point. For this reason, the bottom-sided etching width is smaller than the top-sided etching width with the openings of the insulating layer, and hence, the exposure area of the cathode electrodes to be formed with electron emission regions is reduced.
Accordingly, with the above-structured electron emission device, it is difficult to form micro pixels and fabricate a high resolution display device, and as the amount of the electron emission material to be given on the cathode electrodes is relatively small, it is also difficult to obtain a high luminance display screen.
In order to solve the above problem, an insulating layer can be formed with SiO2 through chemical vapor deposition (CVD) such that it has a thickness of 1-3 μm. However, in this case, as the electron emission regions are formed with a thickness of 2-5 μm due to the characteristic of the thick film processing, such as screen printing, the electron emission regions may be placed higher than the gate electrodes. Consequently, the electrons emitted from the electron emission regions are not focused and/or influenced by the gate electrodes and thereby cause a considerable diffusion of electron beams and/or a diode type electron emission where electrons are mistakenly emitted from the electron emission regions at the pixels to be off-stated due to the influence of the anode electric field.